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MiniMax H3 recipes

FastH3 is two distilled MiniMax-H3 checkpoints. V1 is the four-step launch. Some Hub repo names still say Preview. That name is historical. V1 is a full model, not a demo. V2 is the eight-step checkpoint. More forwards is why V2 is the higher-quality FastH3. The V2 schedule contract is in FastH3 distilled checkpoint schedules. CompactH3 is the 42-block 20B NVFP4 H3 checkpoint for one Blackwell GPU (RTX 5090 or RTX PRO 6000). The FastH3 V1 and V2 recipes are unchanged.

The 42-block pruned checkpoint has an MLX INT8/INT6 conversion and eight-forward T2VA command. It reads fastvideo_inference.json for the trained schedule. The command uses native 832x480 resolution and all requested frames.

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Primary focus · Inference

MiniMax H3 recipes

Generate video and audio with H3. Run a server on CUDA, one Blackwell GPU, one DGX Spark, or Apple Silicon MLX to iterate on prompts, or call the pipeline directly from Python.

11 maintained recipes
Inference live Distillation planned Fine-tuning planned Training planned Evaluation planned Optimization planned Deployment planned
Compare H3 modes and options

Supported modes

CUDA covers T2VA, FL2VA, and Ref2VA on the full checkpoint, plus FastH3 V1 and FastH3 V2, plus CompactH3 NVFP4 on one Blackwell GPU. FastH3 V1 also has a DGX Spark runtime with a 1-Spark or 2-Spark device row. MLX is T2VA only: V1 and V2. Temporal --fast, spatial --fast-spatial, and opt-in VSA are flags on the same MLX script, not extra recipes.

Mode CUDA MLX FastH3
T2VA Full H3, FastH3 V1, FastH3 LoRA, FastH3 V2, CompactH3 NVFP4 FastH3 V1 or FastH3 V2 after a local DiT conversion
FL2VA Full H3 Not wired
Ref2VA Full H3 Not wired
Temporal --fast No cookbook recipe Shorter video denoise, MLX RIFE back to --num-frames, full-duration audio
VSA Trained sparse attention on FastH3 CUDA Opt-in. Convert with --include-vsa into a new directory such as ./FastH3-MLX-vsa, then pass --vsa. Do not overwrite an existing dense export.
Spatial --fast-spatial No cookbook recipe Denoise and decode at height/width divided by --fast-spatial-scale, then resample. Composes with --fast.
Two-pass refine No cookbook recipe Not wired
DGX Spark FastH3 V1 on one GB10, or two Sparks with Ray sequence parallel (sp_size=2) over QSFP RoCE. Select NVIDIA DGX Spark, then 1 Spark or 2 Sparks. Not wired
CompactH3 NVFP4 42-block 20B checkpoint on one RTX 5090 (32 GB, sequential encoder offload) or one RTX PRO 6000 Blackwell (96 GB, encoder+DiT+VAE resident). SageAttention3 FP4, packed NVFP4 DiT, Comfy int8-convrot VAE. Not wired

Pick an H3 recipe and runtime

Choose the result you want, then use a maintained CUDA, Blackwell, DGX Spark, or MLX path. Device claims stay tied to checked-in sources and recorded runs.

Recipe Task and checkpoint
Runtime Maintained paths only

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Workflow Both can run locally

Exact device and memory details appear only when a recorded run supports them.

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Maintained Source-backed Source config
Model
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Workload
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Hardware
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Expected output
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Terminal
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Running this script again starts a new process and reloads the model. To iterate in Python, create the generator once and reuse it for multiple prompts.

Setup

The generated commands expect a local clone:

git clone https://github.com/hao-ai-lab/FastVideo.git
cd FastVideo

Use Configuration for supported Python and CLI settings, Optimizations for attention and memory tradeoffs, and the support matrix for the supported model and optimization surface.

CUDA

UV_TORCH_BACKEND=cu130 uv pip install -e ".[fasth3]"

Apple Silicon

uv pip install -e ".[mlx]"

Follow the MLX install guide for the extra, ffmpeg, and a clone. Then pick FastH3 V1 or V2 in the builder above.

NVIDIA DGX Spark

UV_TORCH_BACKEND=cu130 uv pip install -e .

Follow the DGX Spark install guide for ARM64 CUDA 13. One Spark is a local process. Two Sparks need Ray on the QSFP link:

uv pip install ray

Bring up the cluster from pairing two Sparks before selecting 2 Sparks in the builder.

Troubleshooting
  • The full CUDA H3 examples request four GPUs by default. Their sources do not claim a GPU model or memory minimum.
  • The FastH3 CUDA performance profile was measured on four GB200 GPUs. Use its strict profile when exact operation order matters more than the measured performance configuration.
  • The MLX source runtime supports T2VA, optional temporal --fast, optional spatial --fast-spatial, and opt-in VSA on --include-vsa checkpoints. FastH3 V2 MLX converts with --include-vsa and runs eight forwards. FL2VA, Ref2VA, and two-pass refinement are not wired.
  • GPU count and VAE decode backend are configurable in the builder above for FastH3 CUDA recipes. Only the value shown by default has a recorded run; other supported values are unmeasured here.
  • DGX Spark is a runtime on FastH3 V1, not a separate family card. Select NVIDIA DGX Spark, then 1 Spark or 2 Sparks. The CUDA GPU-count knob does not apply to Spark.
  • CompactH3 NVFP4 is one Blackwell GPU. RTX 5090 (32 GB) parks the encoder in pinned host RAM. RTX PRO 6000 Blackwell (96 GB) keeps encoder, DiT, and VAE resident. Keep FASTVIDEO_ATTENTION_BACKEND=ATTN_QAT_INFER, FASTVIDEO_FA4=0, FASTVIDEO_VSA_SM100A=0, and FLASHINFER_CUDA_ARCH_LIST=12.0a. On PRO 6000 enable VAE compile and leave DiT inference_torch_compile off. CompactH3 is a dense prune; do not enable VIDEO_SPARSE_ATTN_H3 until a VSA-trained student exists.
  • GB10 has no FA4 / sm_100a VSA kernel. Keep FASTVIDEO_FA4=0 and FASTVIDEO_VSA_SM100A=0. Legal num_frames values are 17n+5, capped at 362 (15.08 s). A 345-frame request on one Spark can OOM. Native 16:9 sizes include 832×480 and 1344×768.
  • Gated or missing checkpoints: run huggingface-cli login and confirm you accepted the model's license on Hugging Face.
Evidence status

Every command, model ID, and flag on this page maps to a checked-in FastVideo source. Recipes marked Verified also have a recorded hardware path in linked FastVideo evidence. The full H3 CUDA examples remain Source-backed where the source records a GPU count but no GPU model or memory requirement. Unlisted hardware is unknown, not unsupported.